/** * Copyright 1993-2015 NVIDIA Corporation. All rights reserved. * * Please refer to the NVIDIA end user license agreement (EULA) associated * with this source code for terms and conditions that govern your use of * this software. Any use, reproduction, disclosure, or distribution of * this software and related documentation outside the terms of the EULA * is strictly prohibited. * */ #ifndef NV_UTIL_NPP_IMAGES_CPU_H #define NV_UTIL_NPP_IMAGES_CPU_H #include "ImagePacked.h" #include "ImageAllocatorsCPU.h" #include "Exceptions.h" #include namespace npp { template class ImageCPU: public npp::ImagePacked { public: ImageCPU() { ; } ImageCPU(unsigned int nWidth, unsigned int nHeight): ImagePacked(nWidth, nHeight) { ; } explicit ImageCPU(const npp::Image::Size &rSize): ImagePacked(rSize) { ; } ImageCPU(const ImageCPU &rImage): Image(rImage) { ; } virtual ~ImageCPU() { ; } ImageCPU & operator= (const ImageCPU &rImage) { ImagePacked::operator= (rImage); return *this; } npp::Pixel & operator()(unsigned int iX, unsigned int iY) { return *ImagePacked::pixels(iX, iY); } npp::Pixel operator()(unsigned int iX, unsigned int iY) const { return *ImagePacked::pixels(iX, iY); } }; typedef ImageCPU > ImageCPU_8u_C1; typedef ImageCPU > ImageCPU_8u_C2; typedef ImageCPU > ImageCPU_8u_C3; typedef ImageCPU > ImageCPU_8u_C4; typedef ImageCPU > ImageCPU_16u_C1; typedef ImageCPU > ImageCPU_16u_C3; typedef ImageCPU > ImageCPU_16u_C4; typedef ImageCPU > ImageCPU_16s_C1; typedef ImageCPU > ImageCPU_16s_C3; typedef ImageCPU > ImageCPU_16s_C4; typedef ImageCPU > ImageCPU_32s_C1; typedef ImageCPU > ImageCPU_32s_C3; typedef ImageCPU > ImageCPU_32s_C4; typedef ImageCPU > ImageCPU_32f_C1; typedef ImageCPU > ImageCPU_32f_C3; typedef ImageCPU > ImageCPU_32f_C4; } // npp namespace #endif // NV_IMAGE_IPP_H