/* * Copyright 1993-2015 NVIDIA Corporation. All rights reserved. * * Please refer to the NVIDIA end user license agreement (EULA) associated * with this source code for terms and conditions that govern your use of * this software. Any use, reproduction, disclosure, or distribution of * this software and related documentation outside the terms of the EULA * is strictly prohibited. * */ /* * Demonstration of inline PTX (assembly language) usage in CUDA kernels */ // System includes #include #include // CUDA runtime #include // helper functions and utilities to work with CUDA #include #include __global__ void sequence_gpu(int *d_ptr, int length) { int elemID = blockIdx.x * blockDim.x + threadIdx.x; if (elemID < length) { unsigned int laneid; //This command gets the lane ID within the current warp asm("mov.u32 %0, %%laneid;" : "=r"(laneid)); d_ptr[elemID] = laneid; } } void sequence_cpu(int *h_ptr, int length) { for (int elemID=0; elemID>>(d_ptr, N); checkCudaErrors(cudaGetLastError()); checkCudaErrors(cudaDeviceSynchronize()); sequence_cpu(h_ptr, N); int *h_d_ptr; checkCudaErrors(cudaMallocHost(&h_d_ptr, N *sizeof(int))); checkCudaErrors(cudaMemcpy(h_d_ptr, d_ptr, N *sizeof(int), cudaMemcpyDeviceToHost)); bool bValid = true; for (int i=0; i